Analog Devices, Inc. AD9243ASZ

• Low Power Dissipation: 110 mW
• Single +5 V Supply
• Integral Nonlinearity Error: 2.5 LSB
• Differential Nonlinearity Error: 0.6 LSB
• Input Referred Noise: 0.36 LSB
• On-Chip Sample-and-Hold Amplifier and Voltage Reference
• Signal-to-Noise and Distortion
• Ratio: 79.0 dB
• Spurious-Free Dynamic
• Range: 91.0 dB
• Out-of-Range Indicator
• Straight Binary Output Data
• 44-Lead MQFP

The AD9243 is a 3 MSPS, single supply, 14-bit analog-to- digital converter (ADC). It combines a low cost, high speed CMOS process and a novel architecture to achieve the resolution and speed of existing hybrid implementations at a fraction of the power consumption and cost. It is a complete, monolithic ADC with an on-chip, high performance, low noise sample-and-hold amplifier and programmable voltage reference. An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the application. The device uses a multistage differential pipelined architecture with digital output error correction logic to guarantee no missing codes over the full operating temperature range.

The input of the AD9243 is highly flexible, allowing for easy interfacing to imaging, communications, medical, and data- acquisition systems. A truly differential input structure allows for both single-ended and differential input interfaces of varying input spans. The sample-and-hold amplifier (SHA) is equally suited for both multiplexed systems that switch full-scale voltage levels in successive channels as well as sampling single-channel inputs at frequencies up to and beyond the Nyquist rate. Also, the AD9243 performs well in communication systems employing Direct-IF Down Conversion since the SHA in the differential input mode can achieve excellent dynamic performance well beyond its specified Nyquist frequency of 1.5 MHz.

A single clock input is used to control all internal conversion cycles. The digital output data is presented in straight binary output format. An out-of-range (OTR) signal indicates an over-flow condition which can be used with the most significant bit to determine low or high overflow.